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freemangordon | sailus: " 40: 599 INTC 24 Edge 480bd400.mmu, OMAP3 ISP" :) | 20:30 |
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freemangordon | Pali: ^^^ we got ISP interrupts, still no image, but at least there are signs of life | 20:49 |
Pali | nice!!!! | 20:50 |
freemangordon | Pali: to achieve that, I remove video-bus-switch | 20:50 |
freemangordon | *removed | 20:50 |
freemangordon | we should contact sre | 20:51 |
Pali | yes | 20:51 |
freemangordon | but first, I will try to have something but green image displayed | 20:52 |
DocScrutinizer05 | make sure your video bus switch (actually mux) doesn't operate inverted, enabling front cam when you want main and vice versa | 21:07 |
DocScrutinizer05 | check GPIO_97 | 21:09 |
freemangordon | DocScrutinizer05: no way, i2c bus is switched there as well | 21:09 |
freemangordon | yes, I do that switching by hand | 21:09 |
DocScrutinizer05 | duh! never noticed | 21:09 |
freemangordon | hmm, wait | 21:09 |
freemangordon | it is not i2c bus, my bad | 21:10 |
freemangordon | but gpio is connected to secondary camera reset | 21:10 |
freemangordon | so if it is not the correct value, secondary camera is held in reset and does not respond to i2c bus red/writes | 21:10 |
freemangordon | *reads | 21:10 |
DocScrutinizer05 | o.O | 21:11 |
freemangordon | see schemati, on page 2 | 21:11 |
DocScrutinizer05 | indeed, CAM_B_EN | 21:11 |
freemangordon | yeah | 21:11 |
DocScrutinizer05 | is this actually reset on front cam module? | 21:12 |
freemangordon | hmm, I get lots of error IRQs | 21:12 |
freemangordon | no, it has another gpio for reset (102) | 21:12 |
DocScrutinizer05 | error IRQ? | 21:12 |
freemangordon | yes | 21:12 |
DocScrutinizer05 | please elaborate | 21:13 |
freemangordon | see CSI1B_IRQSTATUS in TRM | 21:13 |
freemangordon | I get 0x615 here :D | 21:13 |
DocScrutinizer05 | aah ok | 21:13 |
DocScrutinizer05 | you got a pagenumber of TRM for me? | 21:14 |
freemangordon | sure | 21:14 |
freemangordon | 1538 | 21:14 |
freemangordon | Table 12-138. | 21:14 |
DocScrutinizer05 | SPRS599D ? | 21:15 |
freemangordon | OMAP34xx_ES3.1.x_PUBLIC_TRM_vZM.pdf | 21:15 |
DocScrutinizer05 | so SPRUF98? | 21:18 |
freemangordon | DocScrutinizer05: http://46.249.74.23/TRM/ | 21:19 |
DocScrutinizer05 | ohmy | 21:19 |
freemangordon | DocScrutinizer05: SWPU223M | 21:20 |
DocScrutinizer05 | thanks! :-) | 21:24 |
DocScrutinizer05 | "bit NNN value 0x0" ??? 0x ? | 21:26 |
freemangordon | hmm? | 21:26 |
freemangordon | DocScrutinizer05: elaborate, please | 21:27 |
DocScrutinizer05 | a bit weird to give a hex value for a one bit var | 21:27 |
freemangordon | one bit? | 21:27 |
freemangordon | DocScrutinizer05: CSI1B_IRQSTATUS | 21:27 |
DocScrutinizer05 | http://wstaw.org/m/2016/04/15/plasma-desktopug2219.png | 21:28 |
freemangordon | aah | 21:28 |
freemangordon | well | 21:28 |
DocScrutinizer05 | minor but puzzling | 21:28 |
freemangordon | actually not, as this is *field* value | 21:29 |
DocScrutinizer05 | you got 0x615? | 21:29 |
freemangordon | it might be longer than 1 bit | 21:29 |
DocScrutinizer05 | yes | 21:29 |
freemangordon | the first is e11, then 411, then 615, which repeats countless times | 21:30 |
freemangordon | 615 is the one that repeats | 21:30 |
DocScrutinizer05 | 0b11000010101 | 21:30 |
freemangordon | so, yeah | 21:30 |
freemangordon | 111000010001 | 21:31 |
freemangordon | e11 | 21:31 |
freemangordon | that bit 4 (reserved) is actually CRC error | 21:32 |
freemangordon | according to the kernel code | 21:32 |
DocScrutinizer05 | mhm | 21:32 |
freemangordon | hmm, KP explicitly sets crc to 0 | 21:33 |
DocScrutinizer05 | according to TRM you write 1(!) to it to reset | 21:34 |
DocScrutinizer05 | sounds weird | 21:34 |
freemangordon | so? | 21:34 |
DocScrutinizer05 | 0x0: READS: Event is false. WRITES: Status bit unchanged. 0x1: READS: Event is true (pending). WRITES: Status bit is reset. | 21:35 |
DocScrutinizer05 | actually e11 doesn't look like too much of an error, most are just sync notifications | 21:36 |
DocScrutinizer05 | just that CRC bit 4 | 21:36 |
DocScrutinizer05 | aiui | 21:36 |
DocScrutinizer05 | and SSC_IRQ bit 0 | 21:37 |
DocScrutinizer05 | which means it's not synced yet | 21:37 |
DocScrutinizer05 | again aiui | 21:37 |
freemangordon | ok, CRC disabled, bit 4 is down | 21:38 |
freemangordon | still no image | 21:38 |
freemangordon | DocScrutinizer05: those sync errors mean that no image will appear | 21:38 |
DocScrutinizer05 | I seem to recall you need to write a sync byte (word?) to cam sensor's "upper left pixel" | 21:39 |
freemangordon | DocScrutinizer05: never heard of that | 21:39 |
DocScrutinizer05 | cloudy memories | 21:40 |
DocScrutinizer05 | maybe it's hardwired in sensor | 21:40 |
DocScrutinizer05 | hmm, sort of there it is: >> Each frame is clearly identified by four unique 32-bit synchronization codes: frame start, frame end, line start, and line end, which are embedded in the serial bitstream. The logical channel identification number is also encoded in the synchronization codes.<< p1324 | 21:47 |
DocScrutinizer05 | table 12-8 Sync codes | 21:48 |
freemangordon | DocScrutinizer05: those codes are the same in stock kernel | 21:49 |
freemangordon | already checked | 21:49 |
DocScrutinizer05 | :nod: | 21:49 |
freemangordon | 3210 | 21:49 |
DocScrutinizer05 | sorry, afk. Prolly I'm not much of a help anyway | 21:49 |
DocScrutinizer05 | Figure 12-57. CSI1 Receiver Block Diagram - first thing after CSI input is "Extract SYNC" | 21:53 |
freemangordon | yep, but this is CSI1 that gives errors | 21:53 |
freemangordon | so nothing gets out | 21:53 |
DocScrutinizer05 | yes, it seems it doesn't sync | 21:54 |
DocScrutinizer05 | on a very low layer | 21:55 |
freemangordon | :nod: | 21:55 |
DocScrutinizer05 | bbl | 21:55 |
freemangordon | however, this is still HUGE success, so far we've never got ISP interrupts | 21:55 |
freemangordon | *get | 21:55 |
DocScrutinizer05 | check module config | 21:57 |
DocScrutinizer05 | (huge success) :-) | 21:57 |
DocScrutinizer05 | wait, I got some bookmark to some useful contribution regarding camera, from a dunno Jolla devel or sth? | 21:58 |
DocScrutinizer05 | I'll try to find that later | 21:58 |
freemangordon | ok | 21:59 |
DocScrutinizer05 | aah | 21:59 |
DocScrutinizer05 | ~fptf | 21:59 |
infobot | extra, extra, read all about it, fptf is the Fremantle Porting Task Force, see http://talk.maemo.org/showthread.php?t=91308 | 21:59 |
DocScrutinizer05 | About camera (about meego/sailfish, but for stuff like zerocopy and omap3camd and how stuff works it applies to fremantle as well, more or less): http://talk.maemo.org/showthread.php...55#post1397155 | 22:00 |
DocScrutinizer05 | hmm, prolly irrelevant here, not kernel related | 22:01 |
DocScrutinizer05 | or is it? omap3camd? | 22:01 |
DocScrutinizer05 | anyway, afk for good now | 22:04 |
freemangordon | YEEEAAH | 22:04 |
freemangordon | got frames in mplayer!!! | 22:05 |
freemangordon | Pali: ^^^ :) | 22:06 |
Sicelo | \m/ | 22:06 |
Pali | wau!! | 22:06 |
freemangordon | well, there still no video, but no green only as well, I guess I need to tweak brightness etc | 22:11 |
freemangordon | waw, test patterns seem to work :) | 22:13 |
freemangordon | *wow | 22:13 |
Sicelo | what test patterns? :) | 22:18 |
freemangordon | vertical strips | 22:20 |
freemangordon | color bars | 22:20 |
freemangordon | 0: Disabled | 22:20 |
freemangordon | 1: Solid Colour | 22:20 |
freemangordon | 2: Eight Vertical Colour Bars | 22:20 |
freemangordon | 3: Colour Bars With Fade to Grey | 22:20 |
freemangordon | 4: Pseudorandom Sequence (PN9) | 22:20 |
DocScrutinizer05 | :-D \o/ :-D \o/ :-D \o/ :-D \o/ :-D \o/ :-D \o/ :-D \o/ :-D \o/ :-D \o/ :-D \o/ :-D \o/ :-D \o/ :-D \o/ | 22:21 |
DocScrutinizer05 | amazing what a lil bit of syncing can do, eh? ;-) | 22:22 |
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freemangordon | well, those bars are heavily distorted, I see way more than 8, an they are almost horizontal | 22:22 |
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DocScrutinizer05 | wait, who generates the test patterns? cam module or CSI interface in SoC? | 22:22 |
freemangordon | but this ia a matter of tweaking | 22:22 |
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freemangordon | I guess it is cam module | 22:23 |
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DocScrutinizer05 | (distorted) sounds like wrong resolution | 22:24 |
freemangordon | rather wrong pixel rate | 22:24 |
DocScrutinizer05 | aka dividers for DMA addressing | 22:24 |
freemangordon | well, there are at least 10 dividers :D | 22:24 |
DocScrutinizer05 | pixel rate is sort of fixed, err synced. CSI has a clock and data differential line | 22:25 |
freemangordon | no, it is not | 22:25 |
freemangordon | camera module gets external clock and has its own pll | 22:25 |
DocScrutinizer05 | it's not fixed, it's controlled by cam module aiui, and the CSI IF is synced to that | 22:25 |
DocScrutinizer05 | aah ok | 22:25 |
DocScrutinizer05 | then the cam PLL can be off too | 22:26 |
freemangordon | loks like, as it reports `Pixel Rate' min 0 max 0 step 0 default 0 current 12000000. | 22:26 |
freemangordon | hmm, this might be ok | 22:27 |
DocScrutinizer05 | anyway you got (at least) one modulo divider for horizontal and one for vertical addressing in DMA on SOC, and you get a resolution setting that prolly works similar in cam module, both must match or the wrong pixel data will end on the wrong RAM address | 22:28 |
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freemangordon | the pipeline is way more complicated, you have CSI then CCDC then previewer then resizer :) | 22:29 |
DocScrutinizer05 | sync between the two modulo divider groups gets done by CSI clk and table 12-8 Sync codes | 22:29 |
DocScrutinizer05 | yeah sure there is more complicated stuff in it than just taht | 22:30 |
DocScrutinizer05 | particularly resizing is 'fun' to get right, I guess | 22:30 |
freemangordon | anyway, I think I did enough for today, will wait for sailus to appear to give some hints on where to look at | 22:31 |
DocScrutinizer05 | good job, you earned your glass of spirit of your choice ;-D | 22:36 |
freemangordon | :) | 22:36 |
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